Implementation of DPA Resistant Circuit using Differential Logic Gates for Advanced Security
نویسنده
چکیده
Differential Power Analysis used in the crypto circuits may be attacked by an another/separate party, using power consumption dependence on secret message/information for hiding critical data (information).To avoid DPA and security basis differential logic styles are basically used, because of constant power dissipation. This paper is also proposed a new design methodology to improvement of pull-down logic configuration for most differential gates are secured. Previously the AND/NAND and XOR/X NOR gates in 90nm VLSI technology, using by SABL (Sense Amplifier Based Logic) for DPDN (Differential Pull down Logic). A new Proposals OR/NOR gates are used to secure/protect Differential logic gates at 90nm technology at 27 o C temperature with simulate to help of Micro Wind and DSCH to eliminate charge in the pull-down differential gate and remove the memory effect.
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